Digital Circuits Week 9 Solutions

 Which of the following is a sequential access memory?

A) Magnetic disk

B) CD

C) DVD

D) RAM


SRAM stores the binary information in

A) the form of electric charges on the capacitor

B) internal latches

C) look-up tables

D) the form of electric charges on the inductor


Which of the following statements is FALSE?

A) SRAM memories has shorter READ and WRITE cycles compared to DRAM 

B) DRAM memories has longer READ and WRITE cycles compared to SRAM

C) SRAM memories occupies minimal area compared to DRAM memories 

D) SRAM memories occupies larger area compared to DRAM memories


What is the ROM size when it has 16-bit address lines as input and 8-bit data lines as output?

A) 216 x 8 bits

B) 28 x 16 bits

C) 162 x 8 bits

D) 215 x 8 bits


Which of the following statements is TRUE?

A) Hamming code can correct and detect only single bit errors

B) Hamming code can correct and detect up to two bit errors

C)Hamming code can correct and detect up to three bit errors 

D)Hamming code can correct and detect up to four bit errors


A 12-bit hamming code read from a memory location. This hamming code contains 8-bit data and 4-bit code word. What was the original 8-bit data word stored in the memory location if the 12-bit hamming code is (0011 1011 1110),?

A) (1001 1110)2

B) (1101 1110)2

C) (1101 1101),

D) (0010 1101)2


Find the 12-bit hamming code for the given 8-bit data (1100 0011)2

A) (1101 1000 1100)2

B) (1010 1000 0011),

C) (0101 0111 1100)2

D) (0010 0111 0011)2


What is the size of hamming code for a 10-bit dataword?

A) 15 bits

B) 14 bits

C) 12 bits

D) 8 bits


Programmable array logic (PAL) contains

A) fixed AND array and fixed OR array.

B) fixed AND array and programmable OR array. 

C) programmable AND array and fixed OR array.

D) programmable AND array and programmable OR array.


Which of the following statements is FALSE?

A) CLB in xilinx virtex 6 FPGA contains one 7-input LUT.

B) CLB in xilinx virtex 6 FPGA contains one 6-input LUT.

C) CLB in xilinx virtex 6 FPGA contains two 5-input LUT

D) CLB in xilinx virtex 6 FPGA contains 64-bit RAM..


Which of the following memory technologies is NOT programmable?

A) Fuse

B) EPROM

C) SRAM

D) EEPROM


Which of the following memory technologies is volatile in nature?

A) Fuse

B) EPROM

C) SRAM

D) EEPROM


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